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Hi,
I try to set and reset a variable on different (alternating) clocks. The first clock should set the variable, the second clock should reset it again. The shift between the clocks determines the pulse duration.
Code:
block RowAddress
Clock clk1=Clock(10);
Clock clk2=shiftSample(clk1,10,100);
Boolean active(start=false);
initial equation
equation
when clk1 then
active = true;
elsewhen clk2 then
active=false;
end when;
end RowAddress;
Openmodelica says: "Clocked when equation can not contain elsewhen part."
(In Dymola this gives an "Unknown internal error in Dymola")
When I split the when into two independent sections
Code:
block RowAddress
Clock clk1=Clock(10);
Clock clk2=shiftSample(clk1,10,100);
Boolean active(start=false);
initial equation
equation
when clk1 then
active = true;
end when;
when clk2 then
active=false;
end when;
end RowAddress;
I get from openmodelica: "Too many equations, over-determined system. The model has 6 equation(s) and 5 variable(s)."
(From dymola I get: the model is structurally singular ("The Boolean part has 4 unknowns and 5 equations." seems to be the problem, although I don't understand what these 4 booleans are),)
Now I assume the second option must be wrong because modelica cannot assume that the events will not occur simultaneously (although they are definitely in this case).
Is this solvable, and how?
Best regards,
Paul
Hi all,
I use Clock() from the modelica synchronous library to try to create a pulse signal. The period and length should be set with parameters.
The following MWE summarizes my problem
Code:
block RowAddress
Real int1;
equation
der(int1) = 1;
when (Clock(0.1)) then
reinit(int1,0);
end when;
end RowAddress;
When running with openmodelica 1.16.0 I get an error window "The code generation process failed ........." but no error information at all.
When I try "Try with old front-end once" I get the message
[1] 10:39:11 Translation Error
[RowAddress: 8:5-8:19]: Operator reinit may only be used in the body of a when equation.
Note that the reinit operator is in the body of a when equation, so the compiler is confused.
Replacing the condition for the when with (int1>1) makes the model run successfully (but it doesn't do what I want any more).
On the other hand I have the following model which implements a wrapping counter:
Code:
block RowAddress1
discrete Integer Countval(start = 1);
equation
when (Clock(0.1)) then
Countval = if (time <= 0 or previous(Countval)>=10) then 1 else previous(Countval) + 1;
end when;
end RowAddress1;
This model runs fine, which confirms that the clock as the when condition is not the problem for openmodelica.
However both models won't run in dymola, with the following error
Code:
Continuous time parts and discrete parts don't decompose for:
Clock_0.isTicking
Countval
Equations:
equation
when Clock_0 then
Countval = (if time <= 0 or previous(Countval) >= 10 then 1 else previous(Countval)+1);
end when;
Clock_0 = Clock(0.1);
Decomposition in base clocks failed.
See the file dsmodelBaseClockDecomposition0.mof.
ERRORS have been issued.
So my question is
- is my code violating modelica, or is openmodelica messing up, and dymola even more?
Best regards,
Paul van der Hulst
Hi,
I noticed that subsampling and supersampling factors in the subsample and supersample functions must be final integer parameters instead of just integer parameters.
For example the below code: as it is it runs fine, but without either of the two final keywords, the compiler refuses, saying:
[1] 15:10:51 Translation Error
pre-optimization module clockPartitioning (simulation) failed.
The code:
Code:
model test_sampling
/*Define the clock structure*/
final parameter Integer AD_oversampling = 20;
final parameter Integer mpx_factor = 2;
Clock Clk_row = Clock(1, 6250000) "Base row clock = 6.25MHz.";
Clock Clk_AD = superSample(Clk_row, AD_oversampling) "AD converter samples each row signal 20x.";
Clock Clk_frame = subSample(Clk_row, mpx_factor) "Number of rows per frame (=oversampling factor).";
initial equation
equation
end test_sampling;
I never saw this documented. The examples are all with fixed numbers.
Is this intentional, missing documentation or a bug?
At the least, the error message is non-specific.
Best regards,
Paul
Hi,
For a project at my new job I decided to move to openmodelica. My first experiment is an ideal time-division multiplexing system. It passes multiple signals through a single signal path during consecutive intervals, and then demodulates it. The ideal version works great. (test.mo in the attached zip file)
To make the model more realistic, I added a low-pass filter in the signal path. Now I get a compilation error:
test_error_02nls.c: In function 'initializeStaticDataNLS14':
test_error_02nls.c:45:87: error: 'INTEGER_ATTRIBUTE {aka struct INTEGER_ATTRIBUTE}' has no member named 'nominal'
sysData->nominal[i] = data->modelData->integerVarsData[0].attribute /* MpxIndex.y */.nominal;
Googling this error brings me to this forum. Previous reports of this error message seem to be related to an algebraic loop. Lo and behold: inserting a unit delay did solve the problem.
I find this strange, since at the model level it does not contain any loops (test_error.mo). If an algebraic loop does exist, then I believe this is generated by openmodelica (in a library, the code translator. Maybe I'm doing something illegal according to the language.
The most surprising thing is that in any other simulation program, a low-pass filter breaks an algebraic loop because it places an integrator in the loop. Here it creates an algebraic loop!
Another possibility is that the filter somehow has a problem with the switched nature of the output of the multiplexer. The error message refers to the index-generator for the multiplexer. The switching is triggered by a "sample()" function.
Would anyone please like to comment on this or give direction how to solve this?
Update June 11 2020: I loaded the model in a trial version of dymola. Dymola has no problem with the model. Therefore I consider this an openmodelica bug.
Best regards,
Paul van der Hulst
PS I'm a newbie regarding openmodelica, but have many years of experience simulating switched systems with simulink and various other simulation packages, including modification of an RK4 integration engine to properly handle state-events.
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